Intel(R) Core(TM) i5-2450M CPU @ 2.50GHz
+287 Cycles for fsave+frstor
+84 Cycles for cpuid
+22 Cycles for rdtsc
+14 Cycles for pushad+popad
+2 Cycles for swap with 2*push+pop
+1 Cycles for swap with xchg eax,edx
+8 Cycles for enter 100+leave
+2 Cycles for push ebp+sub esp,100+leave
+287 Cycles for fsave+frstor
+84 Cycles for cpuid
+21 Cycles for rdtsc
+14 Cycles for pushad+popad
+2 Cycles for swap with 2*push+pop
+1 Cycles for swap with xchg eax,edx
+8 Cycles for enter 100+leave
+2 Cycles for push ebp+sub esp,100+leave
+297 Cycles for fsave+frstor
+84 Cycles for cpuid
+21 Cycles for rdtsc
+14 Cycles for pushad+popad
+2 Cycles for swap with 2*push+pop
+1 Cycles for swap with xchg eax,edx
+8 Cycles for enter 100+leave
+2 Cycles for push ebp+sub esp,100+leave
+289 Cycles for fsave+frstor
+85 Cycles for cpuid
+22 Cycles for rdtsc
+14 Cycles for pushad+popad
+3 Cycles for swap with 2*push+pop
+1 Cycles for swap with xchg eax,edx
+8 Cycles for enter 100+leave
+2 Cycles for push ebp+sub esp,100+leave
JJ,
I can say, with some confidence, that your system don't work here :biggrin: :biggrin:
Intel(R) Core(TM) i3-10100 CPU @ 3.60GHz
303 Cycles for fsave+frstor
1535 Cycles for cpuid
-22 Cycles for rdtsc
-32 Cycles for pushad+popad
-38 Cycles for swap with 2*push+pop
-40 Cycles for swap with xchg eax,edx
-37 Cycles for enter 100+leave
-39 Cycles for push ebp+sub esp,100+leave
277 Cycles for fsave+frstor
1556 Cycles for cpuid
-22 Cycles for rdtsc
-32 Cycles for pushad+popad
-38 Cycles for swap with 2*push+pop
-40 Cycles for swap with xchg eax,edx
-37 Cycles for enter 100+leave
-38 Cycles for push ebp+sub esp,100+leave
277 Cycles for fsave+frstor
1538 Cycles for cpuid
-22 Cycles for rdtsc
-32 Cycles for pushad+popad
-38 Cycles for swap with 2*push+pop
-20 Cycles for swap with xchg eax,edx
-36 Cycles for enter 100+leave
-39 Cycles for push ebp+sub esp,100+leave
302 Cycles for fsave+frstor
1536 Cycles for cpuid
-22 Cycles for rdtsc
-32 Cycles for pushad+popad
8 Cycles for swap with 2*push+pop
39 Cycles for swap with xchg eax,edx
11 Cycles for enter 100+leave
-19 Cycles for push ebp+sub esp,100+leave
hit any key
Interesting, HSE, thanks :thup:
So I fired up my Athlon... not overwhelming, but it looks ok. Did you run the test several times with such results? Every now and then I see negative values, which means that the empty calibration loop took longer than expected, but that's actually not so common :cool:
AMD Athlon Gold 3150U with Radeon Graphics
256 Cycles for fsave+frstor
101 Cycles for cpuid
24 Cycles for rdtsc
8 Cycles for pushad+popad
2 Cycles for swap with 2*push+pop
-1 Cycles for swap with xchg eax,edx
13 Cycles for enter 100+leave
2 Cycles for push ebp+sub esp,100+leave
247 Cycles for fsave+frstor
99 Cycles for cpuid
24 Cycles for rdtsc
8 Cycles for pushad+popad
2 Cycles for swap with 2*push+pop
-1 Cycles for swap with xchg eax,edx
13 Cycles for enter 100+leave
2 Cycles for push ebp+sub esp,100+leave
243 Cycles for fsave+frstor
100 Cycles for cpuid
23 Cycles for rdtsc
8 Cycles for pushad+popad
2 Cycles for swap with 2*push+pop
0 Cycles for swap with xchg eax,edx
16 Cycles for enter 100+leave
2 Cycles for push ebp+sub esp,100+leave
254 Cycles for fsave+frstor
102 Cycles for cpuid
24 Cycles for rdtsc
7 Cycles for pushad+popad
2 Cycles for swap with 2*push+pop
-1 Cycles for swap with xchg eax,edx
14 Cycles for enter 100+leave
2 Cycles for push ebp+sub esp,100+leave
:thumbsup:
Intel(R) Core(TM) i3-10100 CPU @ 3.60GHz
299 Cycles for fsave+frstor
88 Cycles for cpuid
19 Cycles for rdtsc
12 Cycles for pushad+popad
1 Cycles for swap with 2*push+pop
0 Cycles for swap with xchg eax,edx
7 Cycles for enter 100+leave
1 Cycles for push ebp+sub esp,100+leave
298 Cycles for fsave+frstor
88 Cycles for cpuid
19 Cycles for rdtsc
12 Cycles for pushad+popad
1 Cycles for swap with 2*push+pop
3 Cycles for swap with xchg eax,edx
7 Cycles for enter 100+leave
1 Cycles for push ebp+sub esp,100+leave
299 Cycles for fsave+frstor
88 Cycles for cpuid
19 Cycles for rdtsc
12 Cycles for pushad+popad
1 Cycles for swap with 2*push+pop
0 Cycles for swap with xchg eax,edx
7 Cycles for enter 100+leave
1 Cycles for push ebp+sub esp,100+leave
299 Cycles for fsave+frstor
88 Cycles for cpuid
19 Cycles for rdtsc
15 Cycles for pushad+popad
1 Cycles for swap with 2*push+pop
0 Cycles for swap with xchg eax,edx
7 Cycles for enter 100+leave
1 Cycles for push ebp+sub esp,100+leave
hit any key
Very strange. There is a problem only first time :rolleyes:
Intel(R) Core(TM) i5-7200U CPU @ 2.50GHz
358 Cycles for fsave+frstor
107 Cycles for cpuid
17 Cycles for rdtsc
12 Cycles for pushad+popad
-1 Cycles for swap with 2*push+pop
-2 Cycles for swap with xchg eax,edx
8 Cycles for enter 100+leave
-1 Cycles for push ebp+sub esp,100+leave
359 Cycles for fsave+frstor
105 Cycles for cpuid
18 Cycles for rdtsc
11 Cycles for pushad+popad
0 Cycles for swap with 2*push+pop
0 Cycles for swap with xchg eax,edx
9 Cycles for enter 100+leave
0 Cycles for push ebp+sub esp,100+leave
319 Cycles for fsave+frstor
110 Cycles for cpuid
17 Cycles for rdtsc
10 Cycles for pushad+popad
-1 Cycles for swap with 2*push+pop
-2 Cycles for swap with xchg eax,edx
5 Cycles for enter 100+leave
-1 Cycles for push ebp+sub esp,100+leave
356 Cycles for fsave+frstor
104 Cycles for cpuid
18 Cycles for rdtsc
11 Cycles for pushad+popad
-1 Cycles for swap with 2*push+pop
-1 Cycles for swap with xchg eax,edx
5 Cycles for enter 100+leave
-1 Cycles for push ebp+sub esp,100+leave
hit any key
-1 ,seem my cpu is equipped with a flux capacitor :greenclp:
Quote from: HSE on May 28, 2022, 07:17:47 AM
I can say, with some confidence, that your system don't work here :biggrin: :biggrin:
Intel(R) Core(TM) i3-10100 CPU @ 3.60GHz
...
-22 Cycles for rdtsc
-32 Cycles for pushad+popad
-38 Cycles for swap with 2*push+pop
-40 Cycles for swap with xchg eax,edx
-37 Cycles for enter 100+leave
-38 Cycles for push ebp+sub esp,100+leave
...
Congratulations! Seems you have transcended space and time. Reverse time travel has been achieved...
Might want to tune up the flux capacitor though, in order to 'fix' the entries in the positive domain.
Quote from: quarantined on May 31, 2022, 01:56:11 AMCongratulations! Seems you have transcended space and time. Reverse time travel has been achieved...
Might want to tune up the flux capacitor though, in order to 'fix' the entries in the positive domain.
Thanks for the congrats :thup:
I am eager to see your solution. Post your code, I want to test it :thumbsup:
Over time I have seen a lot of well written code undertaking the same timing task but they all run into the same problem, how the OS interacts with the CPU and board hardware.
With ring 3 access you are down the line from the OS which takes over whenever it needs to and the variables of different CPUs with instruction ques, cache lag and a whole host of other variables, a timing that may work OK on one CPU/board will not necessarily do the same on another.
Quote from: jj2007 on May 31, 2022, 06:19:31 AM
Thanks for the congrats :thup:
I am eager to see your solution. Post your code, I want to test it :thumbsup:
The congrats was for HSE, who I have replied to. Apparently his machine is ready for the past, present and future. No code available here as I have not achieved time travel as of yet. :greensml:
Quote from: quarantined on June 01, 2022, 05:24:06 AM
The congrats was for HSE, who I have replied to. Apparently his machine is ready for the past, present and future.
Oh! yes. It's a quantic state-machine. It's in past, present and future at same time. More important yet, running my code, you never know if it's working, or not!!! :biggrin: :biggrin: :biggrin:
:biggrin:
> It's in past, present and future at same time.
David Hume, an English philosopher who referred to the above as "The uniformity of nature over time".
Bertrand Russell responded a few hundred years later with the example of the goose that was well fed and treated well all year but was killed and eaten at Christmas time. :tongue:
:thumbsup: Time is easy in comparation with some... source code!
I have made a search, and look like no philosopher has tackled the "indetermination in source code". :biggrin:
:biggrin:
I take your point, the meaning of life, the meaning of truth etc ... all pale in comparison to some of the code I have seen over time. :tongue:
Quote from: HSE on June 01, 2022, 09:24:10 PM
:thumbsup: Time is easy in comparation with some... source code!
I have made a search, and look like no philosopher has tackled the "indetermination in source code". :biggrin:
well might be time for to write some philosophy :tongue:
what I read years ago was only joke about "-its not a bug,its a feature" :bgrin:
my thought is HLL's none-line number is an illusion,when running it in debugger it looks like its line numbered(memory adresses)
Windows Defender thinks the .exe is a "severe" threat and has quarantined it. Without any source code who knows.
Trojan:Script/Wacatac.B!ml
254 Cycles for fsave+frstor
90 Cycles for cpuid
16 Cycles for rdtsc
9 Cycles for pushad+popad
-1 Cycles for swap with 2*push+pop
-1 Cycles for swap with xchg eax,edx
5 Cycles for enter 100+leave
1 Cycles for push ebp+sub esp,100+leave
Quote from: InfiniteLoop on June 08, 2022, 07:45:33 AM
Windows Defender thinks the .exe is a "severe" threat and has quarantined it. Without any source code who knows.
The archive contains the source. So you know (if you understand assembler code, of course)
Quote from: HSE on June 01, 2022, 05:53:10 AM
More important yet, running my code, you never know if it's working, or not!!! :biggrin: :biggrin: :biggrin:
While running under 'normal' conditions it crashes. Viewing the code run in a debugger, it runs without flaw.
Therefore it seems it changes state simply by observing it. :tongue:
Quote from: quarantined on June 08, 2022, 04:43:14 PMWhile running under 'normal' conditions it crashes.
Strange. What exactly happens? Which CPU, which OS version?