According to Intel, there exist 2 flavors of the FXSAVE/FXRESTOR instructions in 64-bit mode: "Promoted OperandSize" and "Default OperandSize". The difference isn't big, it's just 2 fields - promoted: FPU IP and FPU DP have size 8, default: FPU IP and FPU DP have size 4 and there's still an FPU CS and an FPU DS.
The promoted variant needs the REX.W bit set.
"Other" assemblers use special opcodes for the promoted variant, FXSAVE64/FXRESTOR64. However, in ML64, I was unable so far to find support for this. The opcodes are encoded without REX.W. How can this be achieved with ML64 - without using the DB hack?