If you developed your own CPU...

[zedd151]

If you developed your own CPU what would it have that present offerings from Intel and AMD lack?
Me, I would have plenty of registers for sure. Say 32 registers with the majority able to be used without saving/restoring except when the original contents MUST be saved.
And direct memory to memory copy, is another one that would be nice. 
Of course it would have to be able to support Windows. Or vice versa.     But then it would be nice if Windows users (meaning programmers of course  )  had a say in how Windows is devloped, which in itself is a whole other topic.   


Just an odd thought this beautiful Saturday morning!  "Stop me stop me oh stop me, stop me if this has been done before..."   

[vitsoft]

It has been already done several times, for instance by Agner Fog at https://www.forwardcom.info/

[zedd151]

It has been already done several times, for instance by Agner Fog at https://www.forwardcom.info/

But has it been done here on this forum?     I'd like to hear from people that I actually know, i.e., forum members. 

[jj2007]

And direct memory to memory copy, is another one that would be nice.

But has it been done here on this forum?

See m2m in macros.asm

[zedd151]

See m2m in macros.asm

Duh, that's not direct memory to memory copy, but a 'workaround method', as is mrm. And I expected some form of intelligent responses.     What was I thinking?

[jj2007]

I expected some form of intelligent responses.     What was I thinking?

 

[zedd151]

What was I thinking?

 

Is there intelligent life in this forum?

Apparently not.   

[jj2007]

And direct memory to memory copy, is another one that would be nice.

movsb

[hutch--]

For the true purist,

    mov rax, rcx

Registers are memory, albeit very fast but still memory.   

[daydreamer]

In digital electronics,had task to wire several nand gates to first make 4bit adder
Second task add more nand gates that perform 4bit neg= adder changes to subtractor
I think that low level skill combined with port asm snippets/macros to microcode is needed
To be able make new instructions
Thanks to very big chips nowadays,gpu pixelshaders already has instructions dreamed of earlier
1 cycle trigo functions thanks to luts in hardware
And newer pixelshader versions come with more instructions,like earlier changes in x86 ,286,386,486,586,686,earliest x64
Memtomem copy if not directly supported on main cpu,could be performed with gpu if you use vram instead
Using one of apis that let you create graphics surface in vram and switch between locked (cpu can read/write) and unlocked
About 32 registers,there already are more than that in x64
16 gp regs+control regs,rip reg,16 xmm/ymm regs+control reg,8 fpu regs+control regs

[mikeburr]

i implemented a series of maths functions
1) a series of 32 x 32 cyclic registers a bit like the FPU except that it is more flexible
2) the maths functions have virtually no limit on the length of the string [ i didnt concatenate registers i simply converted to asci to BCD and wrote routines
     that divided or multiplied similar to the sort of thing you wd do on a scrap of paper
in a separate program
1) i wrote a probably unique method of analysing combinations of items using number theory [i did wonder about patenting it if possible as i used it to determine how i
    might divide a canvas but it has uses in load balancing say in a computer kernel, two dimensional planning of space or 3 dim loading of vehicles ] .. it wd be a gd
    candidate but requires powerful computing and can produce a lot of info .. i did try and get in touch with David May [ Inmos and dev worker for Iann Barron] but got no
   reply
regards mike b

[Shintaro]

Hmm...most of the things that annoyed me have been done, like needing a separate FPU. Maybe the on-die GPU has already been done, I don't touch new hardware much anymore as it seems to have become more like what new people to the saxophone get: GAS (Gear Acquisition syndrome), gotta have the latest and greatest.

From a retro point of view:
A CPU that is backwards compatible with older CPU sockets. Where the CPU could sense that it was being used on old hardware and shut off incompatible features, it would need an adapter socket though.

[daydreamer]

From a retro point of view:
A CPU that is backwards compatible with older CPU sockets. Where the CPU could sense that it was being used on old hardware and shut off incompatible features, it would need an adapter socket though.

About no fpu
Think there is old masm directive to send fpu code to fpu emulated library
Haven't yet tried use it with my scalar SSE2 functions
About GAS
I was developing SSE tutorial while needing test programming, so it doesn't ended up only theoretical based,when I started only has amd SSE caps
So got duo core Intel which had SSE2 +more caps and has dual core and mobile ati
But amd was faster with old 1995 legacy cg app
Took many years after before I used SSE2
Got 4 core cpu few years old
Just recently made SIMT programming more than 10+ years after I got the dual core

Old hardware lacking functions : missing other chip that sends interrupt signal makes cpu not use that kind of interrupt

[FORTRANS]

Hi,

About no fpu
Think there is old masm directive to send fpu code to fpu emulated library
Haven't yet tried use it with my scalar SSE2 functions

   The MASM option to use an emulated FPU was of limited use
in my experience.  It required that that you had a "library" of
FPU functions from a HLL.  When I tried to link a program to
such a library, I had problems.  In my case the particular
instructions I was trying to use were not part of the emulation
code that I had access to.  So it did not work.  It had nothing
to do with SSE.

   There were TSRs that provided a emulated FPU for programs
that used the FPU.  Some of those were very useful to me.
Though they were noticeably slower than a real FPU.

Regards,

Steve N.