Author Topic: Instruction Set detection for 32 bit Operating Systems  (Read 46021 times)

FORTRANS

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #30 on: April 27, 2014, 11:42:27 PM »
Hi Gunther,

   Same systems as in Reply #15 for comparison.
P-III, Win 2000.  P-MMX, Win 98.  Celeron, Win XP.

Code: [Select]
Supported Features by Processor and Operating System
====================================================

Vendor String: GenuineIntel
Brand  String: Not supported.

Instruction Sets
----------------

MMX  SSE

Supported Special Instructions
------------------------------

Conditional Moves
FXSAVE and FXSTOR

Please, press enter to end the application ...

This program has performed an illegal operation
and will be shut down.

If the problem persists, contact the program
vendor.


CPU executed an invalid instruction in
module CPU.EXE at 0167:0040131a.
Registers:
EAX=8156b278 CS=0167 EIP=0040131a EFLGS=00010212
EBX=00000001 SS=016f ESP=0074fd80 EBP=0074fe38
ECX=00000000 DS=016f ESI=bff92d08 FS=0e3f
EDX=00000041 ES=016f EDI=0074fe20 GS=0000
Bytes at CS:EIP:
0f 44 cb eb e8 90 84 d2 74 0b 83 c0 01 0f b6 10
Stack dump:
78000000 00409000 00000000 0000001f cccccccc cccccccc cccccccc cccccccc cccccccc cccccccc cccccccc cccccccc 0000001b 001f0010 001f03ca 0074ff78

(The stack dump was wrapped in the dialog.)

Supported Features by Processor and Operating System
====================================================

Vendor String: GenuineIntel
Brand  String: MobileIntel(R)Celeron(R)processor600MHz

Instruction Sets
----------------

MMX  SSE  SSE2

Supported Special Instructions
------------------------------

Conditional Moves
FXSAVE and FXSTOR

Please, press enter to end the application ...

HTH,

Steve N.

hutch--

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #31 on: April 27, 2014, 11:42:57 PM »
Here is the later one on my old quad.

Code: [Select]
        Supported Features by Processor and Operating System
        ====================================================

Vendor String: GenuineIntel
Brand  String: Intel(R)Core(TM)2QuadCPUQ9650@3.00GHz

        Instruction Sets
        ----------------

MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1

        Supported Special Instructions
        ------------------------------

Conditional Moves
FXSAVE and FXSTOR
XSAVE and XSTOR for processor extended state management.

Please, press enter to end the application ...

hutch at movsd dot com
http://www.masm32.com    :biggrin:  :skrewy:

dedndave

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #32 on: April 28, 2014, 12:05:50 AM »
i didn't notice SAHF/LAHF on any of the other processors, which i think they should support
although it applies to 64-bit mode, it's nice to know if the feature is present, even in 32-bit

this is my prescott - all seems correct   :t
Code: [Select]
        Supported Features by Processor and Operating System
        ====================================================

Vendor String: GenuineIntel
Brand  String: Intel(R)Pentium(R)4CPU3.00GHz

        Instruction Sets
        ----------------

MMX  SSE  SSE2  SSE3

        Supported Special Instructions
        ------------------------------

Conditional Moves
FXSAVE and FXSTOR

Gunther

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #33 on: April 28, 2014, 01:42:59 AM »
Hi Dave,

thank you for testing.
i didn't notice SAHF/LAHF on any of the other processors, which i think they should support
although it applies to 64-bit mode, it's nice to know if the feature is present, even in 32-bit

I'll think about it. Shouldn't be to hard to implement.

Here is the later one on my old quad.

that seems what it should be. Thank you.

Gunther
Get your facts first, and then you can distort them.

Gunther

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #34 on: April 28, 2014, 01:46:30 AM »
Hi Biterider,

thank you for your effort, but the update is Iset32U1.zip.

Hi Fortrans,

the GPF makes me wonder. What happened exactly?

Gunther
Get your facts first, and then you can distort them.

FORTRANS

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #35 on: April 28, 2014, 02:14:20 AM »
the GPF makes me wonder. What happened exactly?

Hi Gunther,

   I opened an MS-DOS session, and ran the program.  Then the
error dialog popped up, no other output was seen.  I copied the
error information, closed the dialog, exited the session, and tried
to shut down the laptop.  Windows complained of a program that
would not close, and I had to reset it to shut it off.

Regards,

Steve N.

FORTRANS

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #36 on: April 28, 2014, 03:23:41 AM »
Hi,

   Noting that you had a .686P directive in your assembler code,
and that the P-MMX is a .586, I tried an experiment.  I booted up
my other Windows 98 machine, with a P-II CPU, and ran your
program on it.  It ran successfully, and here are the results.

   There are some differences in how the two machines are set up.
(At least they work some things a bit differently.)  So, I suppose it
could be one of those differences that allowed your program to run.

Code: [Select]
        Supported Features by Processor and Operating System
        ====================================================

Vendor String: GenuineIntel
Brand  String: Not supported.

        Instruction Sets
        ----------------

MMX

        Supported Special Instructions
        ------------------------------

Conditional Moves
FXSAVE and FXSTOR

Please, press enter to end the application ...

HTH,

Steve N.

Gunther

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #37 on: April 28, 2014, 05:12:37 AM »
Hi Steve,

   Noting that you had a .686P directive in your assembler code,
and that the P-MMX is a .586, I tried an experiment.  I booted up
my other Windows 98 machine, with a P-II CPU, and ran your
program on it.  It ran successfully, and here are the results.

thank you. I think it has to do with some Windows 98 behavior.

Gunther
Get your facts first, and then you can distort them.

Gunther

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #38 on: April 28, 2014, 05:36:11 AM »
I've found that the behavior of Windows 7 Professional (64 bit) is different than the 32-bit version. Here's the 64-bit output:
Quote

        Supported Features by Processor and Operating System
        ====================================================

Vendor String: GenuineIntel
Brand  String: Intel(R)Core(TM)i7-3770CPU@3.40GHz

        Instruction Sets
        ----------------

MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX

        Supported Special Instructions
        ------------------------------

Conditional Moves
FXSAVE and FXSTOR
XSAVE and XSTOR for processor extended state management.
POPCNT
RDRAND
AES (Advanced Encryption Standard) Instruction Set
16-bit floating-point Conversion Instructions

Please, press enter to end the application ...


AVX is supported. Here's the 32-bit output, same machine, but running is VM under VirtualBox:
Quote

   Supported Features by Processor and Operating System
   ====================================================

Vendor String: GenuineIntel
Brand  String: Intel(R)Core(TM)i7-3770CPU@3.40GHz

   Instruction Sets
   ----------------

MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2

   Supported Special Instructions
   ------------------------------

Conditional Moves
FXSAVE and FXSTOR
XSAVE and XSTOR for processor extended state management.
POPCNT
RDRAND
AES (Advanced Encryption Standard) Instruction Set
16-bit floating-point Conversion Instructions

Please, press enter to end the application ...



No AVX. Both operating systems are running with SP 1. That's a bit strange, isn't it?

Gunther
Get your facts first, and then you can distort them.

Antariy

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #39 on: April 29, 2014, 07:08:56 AM »
Hi Gunther,

the GPF makes me wonder. What happened exactly?

there was cmove ecx,ebx instruction executed which isn't supported by PMMX, probably it was generated by C compiler, if the compiler will optimize your code for 586 line the program will work on PMMX too :t

Antariy

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #40 on: April 29, 2014, 07:19:53 AM »
Results are proper

        Supported Features by Processor and Operating System
        ====================================================

Vendor String: GenuineIntel
Brand  String: Intel(R)Celeron(R)CPU2.13GHz

        Instruction Sets
        ----------------

MMX  SSE  SSE2  SSE3

        Supported Special Instructions
        ------------------------------

Conditional Moves
FXSAVE and FXSTOR

Please, press enter to end the application ...

Antariy

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #41 on: April 29, 2014, 07:32:11 AM »
Just a note: The information about crash reason was found thanks to Steve's (FORTRANS') dump data :t

FORTRANS

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #42 on: April 29, 2014, 07:48:04 AM »
Hi Alex,

   Thanks for the analysis.  I guess I should read up on CMOV,
and see if there is an easy test for its existence or absence.

Cheers,

Steve N.

Antariy

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #43 on: April 29, 2014, 08:17:10 AM »
Hi Steve,

I did not notice CMOV in the ASM source, too, I think it is the code produced by C compiler, i.e. the HLL compiler optimized the code for 686 and later machines and used appropriate instuctions, like CMOV, where it was required. So the way to fix the program is just to recompile the C sources with optimization for 586 machines. Though at the moment no C compiler around to check this.

Gunther

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Re: Instruction Set detection for 32 bit Operating Systems
« Reply #44 on: April 29, 2014, 06:02:21 PM »
Alex,

there was cmove ecx,ebx instruction executed which isn't supported by PMMX, probably it was generated by C compiler, if the compiler will optimize your code for 586 line the program will work on PMMX too :t

thank you for helping. Good catch. :t I'll re-compile the C source.

Gunther
Get your facts first, and then you can distort them.