Author Topic: CPUID Test piece for later Intel processors.  (Read 24113 times)

Siekmanski

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Re: CPUID Test piece for later Intel processors.
« Reply #15 on: July 05, 2012, 06:28:29 AM »
Dave I found your SSE3.
It moved to my PC.  :biggrin:

But I lost my SSSE3


Creative coders use backward thinking techniques as a strategy.

dedndave

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Re: CPUID Test piece for later Intel processors.
« Reply #16 on: July 05, 2012, 07:17:38 AM »
 :biggrin:

SSE3 is leaf 0000_0001, ECX bit 0
SSSE3 is leaf 0000_0001, ECX bit 9

Adamanteus

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Re: CPUID Test piece for later Intel processors.
« Reply #17 on: July 05, 2012, 05:38:23 PM »
That's correct, but I've done exact this - so seemd you not have SSE3 and you vendor string could be duck,
in such case best is to get CPU frequency, if it's really 3000, probably something wrong in docs.
So, I've made a little changes in program  :t
« Last Edit: July 06, 2012, 03:49:16 AM by Adamanteus »

FORTRANS

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Re: CPUID Test piece for later Intel processors.
« Reply #18 on: July 05, 2012, 10:43:21 PM »
Hi,

   The program from Reply #17 crashes on my P-III.
It also does not report SSE available.

Regards,

Steve

dedndave

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Re: CPUID Test piece for later Intel processors.
« Reply #19 on: July 05, 2012, 11:08:31 PM »
i am fairly certain that this machine supports SSE3
as many times as Jochen and i have tested it - lol

just to be sure, i wrote a simple console app to verify...
Code: [Select]
        .XCREF
        .NOLIST
        INCLUDE    \masm32\include\masm32rt.inc
        .586
        .LIST

        .CODE

_main   PROC

        mov     eax,1
        cpuid
        print uhex$(ecx),13,10
        inkey
        exit

_main   ENDP

        END     _main
results on a prescott w/htt...
Code: [Select]
0000649Dleaf 0000_0001, ECX, bit 0 = 1

qWord

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Re: CPUID Test piece for later Intel processors.
« Reply #20 on: July 06, 2012, 12:10:47 AM »
hi Adamanteus ,

your RECORD definitions are reversed: the first entry get the most significant bit/bit-range, the last the least significant bit/bit-range:

Code: [Select]
xyz RECORD bit2:1,bit1:1,bit0:1
MREAL macros - when you need floating point arithmetic while assembling!

dedndave

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Re: CPUID Test piece for later Intel processors.
« Reply #21 on: July 06, 2012, 12:25:41 AM »
unrelated...
if you are interested in the CPUID instruction,
a couple years ago, i made this table from the ones in intel/amd docs and added some corrections

Adamanteus

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Re: CPUID Test piece for later Intel processors.
« Reply #22 on: July 06, 2012, 04:00:22 AM »
 That's originaly was used by C-structure, and h2incx version 0.99.19 (downloaded from old forum) such translated records. Records in MASM at all not good implemented – names of fields have global scope and what bit is most significant in it not written in documentation and MASM32 Reference also.
 For Signatures.zip also thanks, I can't before find AMD Modles-Stepping names, even in AMD CPUID Specification.

P.S. I changed previous archive, now I hope it works  :eusa_clap:

qWord

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Re: CPUID Test piece for later Intel processors.
« Reply #23 on: July 06, 2012, 04:35:16 AM »
The measured frequency is not correct, because your code assumes that the performance counter's frequency is the same on all machines.
Code: [Select]
cpu_mips PROC USES ebx
LOCAL counter : QWORD, start : QWORD, stop : QWORD
LOCAL freq:QWORD

invoke QueryPerformanceFrequency,ADDR freq
invoke QueryPerformanceCounter, ADDR start
RDTSC
MOV DWORD PTR counter, EAX
MOV DWORD PTR counter + 4, EDX

; ïîëó?åíèå ìíîæèòåëÿ è òàêòîâ
invoke Sleep, 23
invoke QueryPerformanceCounter, ADDR stop
RDTSC
MOV EBX, DWORD PTR start
SUB DWORD PTR stop, EBX
MOV EBX, DWORD PTR start + 4
SBB DWORD PTR stop + 4, EBX
MOV DWORD PTR start, TIMERFREQSEC
FILD freq
FILD stop
FDIV ; äåëèì êîëè?åñòâî òèêîâ òàéìåðà â ñåêóíäó

SUB EAX, DWORD PTR counter
SBB EDX, DWORD PTR counter + 4
MOV DWORD PTR counter, EAX
MOV DWORD PTR counter + 4, EDX
FILD counter
FMUL ; ïîäïðàâëÿåì çíà?åíèå íà ôàêòè?åñêîå âðåìÿ

MOV DWORD PTR counter, 1000000 ; <= 1E6 !
FILD DWORD PTR counter
FDIV ; äåëèì íà ìèëëèîí îïåðàöèé â ñåêóíäó
FISTP DWORD PTR counter
MOV EAX, DWORD PTR counter
RET
cpu_mips ENDP
This one returns more useful values on my i5.
MREAL macros - when you need floating point arithmetic while assembling!

dedndave

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Re: CPUID Test piece for later Intel processors.
« Reply #24 on: July 06, 2012, 04:35:59 AM »
 :t
Code: [Select]
Vendor String = GenuineIntel
CPU String    = Intel(R) Pentium(R) 4 CPU 3.00GHz
Frequency     = 12

SSE4.2     NO
SSE4.1     NO
SSE3       YES
SSE2       YES
SSE        YES
MMX        YES

you may want to add another one for SSSE3
and - i guess "Frequency = 12" is a multiplier ?

Adamanteus

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Re: CPUID Test piece for later Intel processors.
« Reply #25 on: July 06, 2012, 06:36:56 AM »
The measured frequency is not correct, because your code assumes that the performance counter's frequency is the same on all machines.
Yes again right, that'a algo works on old versions of Windows better on TIMERFREQSEC constant, now happend better on QueryPerformanceFrequency, so it down and works better previous version.

FORTRANS

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Re: CPUID Test piece for later Intel processors.
« Reply #26 on: July 06, 2012, 10:13:44 PM »
Hi,

   Still crashes.  Screen capture JPEG renamed to ZIP
is attached.

Steve

dedndave

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Re: CPUID Test piece for later Intel processors.
« Reply #27 on: July 07, 2012, 01:37:09 AM »
perhaps it has something to do with how the icon is painted   :P


Adamanteus

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Re: CPUID Test piece for later Intel processors.
« Reply #28 on: July 07, 2012, 09:30:31 PM »
   Still crashes.  Screen capture JPEG renamed to ZIP
That's not for all versions of Windows and hardware, if you are sure that have modern one – try to reinstall Windows, could be critical updates.

dedndave

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Re: CPUID Test piece for later Intel processors.
« Reply #29 on: July 07, 2012, 10:34:19 PM »
i doubt Steve is going to re-install windows
his machines have been tested by many programs   :P