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RIP built in JWasm

Started by habran, December 03, 2014, 07:45:52 AM

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habran

I succeeded to build in RIP register :biggrin:
You must be aware of RIP usage
In disassembly you can not see RIP because it is not built in any disassembler
test it please
for now only 64 bit binaries:
Cod-Father

habran

#1
To get a 64 bit value of location pointed by RIP register use:
mov rax,[rip]
To get the address pointed by RIP register use:
lea rax,[rip]

here is how you can use RIP:

displacement EQU 200h

mov ah,[rip] 
mov rax,[rip+3]
mov rax,[rip+400h]
mov cx,[rip+128]
mov [rip+127],cx
mov [rip+displacement],rbx
mov rbx,[rip+displacement]
mov rax,[rip]
mov [rip+1],sil
cmp byte ptr [rip], 90h
lea rbx,[rip]
lea rax,[rip+2]
call qword ptr[rip+400]
push [rip]
push [rip+80h]
pop [rip]



Cod-Father

habran

This is just a test, now my job is to prevent wrong usage and display errors
this means that I have to go through all possible commands that could use RIP register
when I finish I will upload source and give all possible examples when and how we can use it  8)
I wish I had source of WinDbg and Visual Studio Debuger, so that I can change it there as well :(
Cod-Father

anunitu

Did a search to understand RIP,so is it just in 64 bit mode?

habran

Yes anunitu, RIP is 64 bit register and RIP-relative addressing is available only in 64 bit
Cod-Father

anunitu

Haven't messed with 64 bit,but glad someone is looking into it. Is there an advantage to working in 64 bit?

habran

All new computers are 64 bit, even if there was no advantage you can not live in the past, but there is a great advantage:
  16 GPR registers an 8 of them nonvolatile (rbx,rbp,rdi,rsi,r12,r13,r14,r15)
  16 xmm registers     128 bit
  16 ymm register with AVX    256 bit
  32 zmm registers with AVX-512    512 bit (year 2015 I am looking forward :biggrin:)
  AVX-512 instructions also support for 32 SIMD registers in 64-bit mode (XMM0-XMM31, YMM0-YMM31 and    ZMM0-ZMM31).
The number of available vector registers in 32-bit mode is still 8. 
As we know, CPU likes registers and dislikes a memory ;)
Cod-Father

anunitu

THAT is a LOT of registers. I still remember dos and trying a lot of tricks to get around so few regs..

habran

That's why I liked Motorola processors before :biggrin:
Cod-Father

TWell

This example from here seems to work with that JWasm:
.model flat

extern MessageBoxA: PROC
extern ExitProcess: PROC

.data
testok    db 'RIP based addressing worked!', 0
testfail  db 'RIP based addressing failed at test '
testcode  db '0'
          db '!', 0
testtitle db 'RIP based addressing test by Fibergeek', 0

.code

public Main

Main:
  sub rsp, 40
  ; Put the value of the NOP opcode in R8B
  mov r8b, 90h

  ; Assume that the test failed
  lea rax, testfail

  ; Test 1
  ; NOTE: i'm hardcoding this instruction because of ML64
  inc testcode
  cmp [rip], r8b
  ;DB 44h, 38h, 05h, 00h, 00h, 00h, 00h
  nop
  jne done

  ; Test 2
  ; NOTE: i'm hardcoding this instruction because of ML64
  inc testcode
  lea rbx, [rip]
  ;DB 48h, 8Dh, 1Dh, 00h, 00h, 00h, 00h
  nop
  cmp [rbx], r8b
  jne done

  ; Test 3
  inc testcode
  call $ + 5
  nop
  pop rbx
  cmp [rbx], r8b
  jne done

  ; Test 4
  inc testcode
  call $ + 5
  pop rbx
  add rbx, 1 + 1 + 2 + 1 ; 1=POP, 1=REX, 2=ADD, 1=imm8
  nop
  cmp [rbx], r8b
  jne done

  ; All tests succeeded
  lea rax, testok

done:
  ; Display the result and exit the program
  mov r9d, 0         ; R9D = UINT uType
  lea r8,  testtitle ; R8  = LPCTSTR lpCaption
  mov rdx, rax       ; RDX = LPCSTR lpText
  mov rcx, 0         ; RCX = HWND hWnd
  call MessageBoxA
  mov ecx, eax       ; ECX = UINT uExitCode
  call ExitProcess

  ; Just in case :)
  ret
END Main

habran

Hi TWell :biggrin:
Thank you for testing :t
There is no doubt that it works fine
All I have to do yet is to prevent wrong usage
thank you for the link, I'll look it up later tonight
Cod-Father

Gunther

Hi TWell,

good link. Thank you for providing it.

Gunther
You have to know the facts before you can distort them.

TWell

Can someone explain that RIP / PIC thing, what that actually is?
Less relocations, but how?

anunitu

Link from Intel on 64 bit programming in assembler.

https://software.intel.com/en-us/articles/introduction-to-x64-assembly

habran

I have uploaded a new version with all possible usage (I hope so)
Please test it and if you are happy I'll post the source as well 8)
Cod-Father