64 bit assembler > ASMC Development

More high level directives in ASMC and DOS

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nikkho:
I already requested this in UASM, and they seem not to be very interested in 16 bit, so let me post that here too.

I am a former TASM user, than then moved to JWASM. I mainly develop DOS programs, and this is why I miss default DOS binaries, that were available under JWASM. Do you consider releaseing them too?

Also, since the time of TASM, I miss some high level/SMART directives that were available, for instance:
- FASTIMUL dest_reg, source_r/m, value
This instruction is much like the trinary IMUL operation available on the 80186, 80286, and 80386 processors. The dest_reg destination register is a WORD register (or it can be DWORD on the 80386). source_r/m is a register or memory address that must match the size of the destination. value is a fixed, signed constant multiplicand. FASTIMUL uses a combination of IMUL, MOV, NEG, SHL, ADD, and SUB instructions to perform its function. This function destroys the source register or memory address, and leaves the processor flags in an indeterminate state.

- SHL/SHR/RCL/RCR/ROL/ROR: When .8086 was used, it was unrolled such as SHR AX, 2, as SHR AX, 1 / SHR AX, 1.

- SETFLAG - a "smart-flag" instruction implementing OR

- TESTFLAG - a "smart-flag" instruction implementing TEST

- FLIPFLAG - a "smart-flag" instruction implementing XOR

- CLRFLAG - [bytepointer.com edit] I think this is a doc bug where the writers meant to specify MASKFLAG as CLRFLAG does not exist and likely never existed; there is no CLRFLAG identifier embedded within this version or any version of TASM; CLRFLAG is also not documented anywhere else but the one place it was ever mentioned: the keywords table for version 3.0.

- MASKFLAG (u) - a "smart-flag" instruction implementing AND; accidentally documented in the new keywords for version 3.0 table as CLRFLAG

- SETFIELD generates code that sets a value in a record field. Its syntax follows:

- GETFIELD retrieves data from a record field. It functions as the logical reverse of the SETFIELD instruction. Its syntax follows:               


As a bonus, I would like to see some kind of optional optimizations options, that if enabled will for instance replace, and give a warning message when done, about some inneficient casuistics:
 - mov ah, 3 / mov al, 5 => mov ax, 0305h
 - dec cx / cmp cx, 0 / je label => dec cx / je label
 - shl cx, 1 / shl cx, 1 => shl cx, 2 (if .186 or later)
 - cmp cx, 0 / je label => jcxz label
 - mov eax, 0 => xor eax, eax (if flags are not used)
 - cmp eax, 0 => test eax, eax (if flags are not used)
 - mov eax, -1 => or eax, -1 (if flags are not used)

Those would allow to get an extra performance boost while assembling with UASM from an automatic ASM generated listing, and why not, to automatically optimize some third party codes.

Reason to be it optional by using a command-line option and a directive, is of course that it could broke some internal code that could rely on timmings or code sizes.

Looking forward to hear from you.

nidud:
Hi nikkho,


--- Quote from: nikkho on June 07, 2017, 09:26:13 PM ---I already requested this in UASM, and they seem not to be very interested in 16 bit, so let me post that here too.
--- End quote ---

HJWasm/Uasm is mainly a 64-bit enhancement of Jwasm developed using the latest version of Microsoft Visual Studio. It focus mainly on newer hardware as AVX-512 and VEX implementation, so backward compatibility is not a high priority.

Asmc is built using command line tools, mainly the Open Watcom tool-chain as used to build Jwasm. It preserve  backward compatibility with both older version of Masm and Jwasm. The default compatibility mode for ML is version 8 but it include SSE and AVX instructions as well.


--- Quote ---I am a former TASM user, than then moved to JWASM. I mainly develop DOS programs, and this is why I miss default DOS binaries, that were available under JWASM. Do you consider releaseing them too?
--- End quote ---

Do to all changes in Jwasm the DOS (Jwasmr) version become obsolete at one point so you wont be able to build it even with the latest versions of Jwasm, so all 16-bit related source is removed from Asmc.


--- Quote ---Also, since the time of TASM, I miss some high level/SMART directives that were available, for instance:
- FASTIMUL dest_reg, source_r/m, value
This instruction is much like the trinary IMUL operation available on the 80186, 80286, and 80386 processors. The dest_reg destination register is a WORD register (or it can be DWORD on the 80386). source_r/m is a register or memory address that must match the size of the destination. value is a fixed, signed constant multiplicand. FASTIMUL uses a combination of IMUL, MOV, NEG, SHL, ADD, and SUB instructions to perform its function. This function destroys the source register or memory address, and leaves the processor flags in an indeterminate state.
--- End quote ---

There is no development for 16-bit code other than maintaining the compatibility that already exist, so you have to use macros or TASM for this.


--- Quote ---- SHL/SHR/RCL/RCR/ROL/ROR: When .8086 was used, it was unrolled such as SHR AX, 2, as SHR AX, 1 / SHR AX, 1.
--- End quote ---

Well, it's possible..


--- Quote ---- SETFLAG - a "smart-flag" instruction implementing OR
- TESTFLAG - a "smart-flag" instruction implementing TEST
- FLIPFLAG - a "smart-flag" instruction implementing XOR
- CLRFLAG - [bytepointer.com edit] I think this is a doc bug where the writers meant to specify MASKFLAG as CLRFLAG does not exist and likely never existed; there is no CLRFLAG identifier embedded within this version or any version of TASM; CLRFLAG is also not documented anywhere else but the one place it was ever mentioned: the keywords table for version 3.0.

- MASKFLAG (u) - a "smart-flag" instruction implementing AND; accidentally documented in the new keywords for version 3.0 table as CLRFLAG

- SETFIELD generates code that sets a value in a record field. Its syntax follows:

- GETFIELD retrieves data from a record field. It functions as the logical reverse of the SETFIELD instruction. Its syntax follows:
--- End quote ---


--- Code: ---r0      RECORD fa:1,fb:1,fc:1
flag    r0 <1,0,1>

--- End code ---


--- Code: ---    or      flag,mask fa    ; SETFLAG
    test    flag,mask fb    ; TESTFLAG
    xor     flag,mask fc    ; FLIPFLAG

--- End code ---


--- Quote ---As a bonus, I would like to see some kind of optional optimizations options, that if enabled will for instance replace, and give a warning message when done, about some inneficient casuistics:
 - mov ah, 3 / mov al, 5 => mov ax, 0305h
 - dec cx / cmp cx, 0 / je label => dec cx / je label
 - shl cx, 1 / shl cx, 1 => shl cx, 2 (if .186 or later)
 - cmp cx, 0 / je label => jcxz label
 - mov eax, 0 => xor eax, eax (if flags are not used)
 - cmp eax, 0 => test eax, eax (if flags are not used)
 - mov eax, -1 => or eax, -1 (if flags are not used)

--- End quote ---

If you read the manual and look at sample code provided you will find many of these things implemented, but not in any form that break compatibility with existing code. Also keep in mind the difference between an assembler and a compiler: less nanny help  :P

nikkho:

--- Quote from: nidud on June 07, 2017, 11:31:35 PM ---
--- Quote ---- SHL/SHR/RCL/RCR/ROL/ROR: When .8086 was used, it was unrolled such as SHR AX, 2, as SHR AX, 1 / SHR AX, 1.
--- End quote ---

--- End quote ---

Would like to see it.

nikkho:

--- Quote from: nikkho on June 08, 2017, 01:40:15 AM ---
--- Quote from: nidud on June 07, 2017, 11:31:35 PM ---
--- Quote ---- SHL/SHR/RCL/RCR/ROL/ROR: When .8086 was used, it was unrolled such as SHR AX, 2, as SHR AX, 1 / SHR AX, 1.
--- End quote ---

--- End quote ---

Would like to see it.

--- End quote ---

Any update on this?

nidud:
No I haven't looked into this yet. You may solve this using macros thought:


--- Code: ---; 8086.INC--

    option renamekeyword: <shr>=@@shr
    option renamekeyword: <shl>=@@shl

shr macro reg, val
    repeat val
    @@shr reg,1
    endm
    endm

shl macro reg, val
    repeat val
    @@shl reg,1
    endm
    endm

--- End code ---


--- Code: ---    .model small

include 8086.inc

    .code

    shr ax,3
    shl bx,2

    end

--- End code ---

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