Author Topic: RECORDS 128 bite wide implemented in UASM  (Read 699 times)

habran

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RECORDS 128 bite wide implemented in UASM
« on: October 07, 2017, 07:03:23 PM »
We have extended RECORDS to 128 bit in UASM for both 32 and 64 bit and it can be used as data or inline 8)
here are some examples:
Code: [Select]
COLOR2  RECORD black:8, green:8, jelow:8, white:8,blue:8, red:8, brown:8, pink:8,black1:8, green1:8, jelow1:8, white1:8,blue1:8, red1:8, brown1:8, pink1:8
.data
gold COLOR2 <1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16>
here is  inline:
Code: [Select]
   205:     MOV128   rubi.rc, COLOR2<1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16>
00007FF689451093 C7 05 9B 3F 00 00 10 0F 0E 0D mov         dword ptr [rubi+8h (07FF689455038h)],0D0E0F10h 
00007FF68945109D C7 05 95 3F 00 00 0C 0B 0A 09 mov         dword ptr [rubi+0Ch (07FF68945503Ch)],90A0B0Ch 
00007FF6894510A7 C7 05 8F 3F 00 00 08 07 06 05 mov         dword ptr [rubi+10h (07FF689455040h)],5060708h 
00007FF6894510B1 C7 05 89 3F 00 00 04 03 02 01 mov         dword ptr [rubi+14h (07FF689455044h)],1020304h 
we have also built in MOV128 MACRO in the macrolib
MOV128 MACRO dst:REQ, immLo:REQ,immHi:REQ
  MOV64 dst, immLo
  MOV64 dst + 8, immHi
ENDM

 it can be use to store 128 bit data:
Code: [Select]
   206:     MOV128   rubi.rc,0E0E1E20EE0E1E20Eh,0E0E1E20EE0E1E20Eh
00007FF6894510BB C7 05 73 3F 00 00 0E E2 E1 E0 mov         dword ptr [rubi+8h (07FF689455038h)],0E0E1E20Eh 
00007FF6894510C5 C7 05 6D 3F 00 00 0E E2 E1 E0 mov         dword ptr [rubi+0Ch (07FF68945503Ch)],0E0E1E20Eh 
00007FF6894510CF C7 05 67 3F 00 00 0E E2 E1 E0 mov         dword ptr [rubi+10h (07FF689455040h)],0E0E1E20Eh 
00007FF6894510D9 C7 05 61 3F 00 00 0E E2 E1 E0 mov         dword ptr [rubi+14h (07FF689455044h)],0E0E1E20Eh 

 
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habran

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Re: RECORDS 128 bite wide implemented in UASM
« Reply #1 on: October 07, 2017, 07:25:12 PM »
we will just do some more testing before we publish it :biggrin:
It opens a new page of usage.
While developing MOV128 RECORD, we had to design a new macro, because intrin shifts only 2 QWORDS
and if you shift more than 64 bit both values get lost:
Code: [Select]
/* This function shifts left 128 bit unsigned QWORD for the 128 bit RECORD
*  that means that one field of record is limited to 64 bit
*/
 void ShiftLeft (uint_64 *dstHi, uint_64 *dstLo,uint_64 num, int pos)
  {
  uint_64 orHi = 0;
  uint_64 orLo = num;
 
  if (pos >= 0x40){       /* if shift is greater than 64 we can discard upper qword after shift */
    orHi = orLo;          /* just load lower qword to upper  */
    orLo = 0;             /* now clear lower qword   */
    pos = pos - 0x40;     /* subtract 64 from counter   */
    orHi = orHi << pos;   /* now shift left with residue */
    }
  else {                  /* shift is less than 64 bits */
    orLo = orLo << pos;   /* shift left lower qword */
    num = num >> ~pos;    /* shift right number with negative pos to get the residue which was shifted out from lower qword */
    orHi |= num;          /* now or it on the front */
    }
    *dstHi |= orHi;
    *dstLo |= orLo;
  }
which is compiled to this code:
Code: [Select]
ShiftLeft PROC
mov r10, rcx
cmp r9d, 64
jl SHORT LN2
lea ecx, DWORD PTR [r9-64]
shl r8, cl
or QWORD PTR [r10], r8
ret 0
LN2:
mov ecx, r9d
mov rax, r8
not r9d
shl rax, cl
movzx ecx, r9b
shr r8, cl
or QWORD PTR [r10], r8
or QWORD PTR [rdx], rax
ret 0
ShiftLeft ENDP
we have created 7 new macros in assembly language which will also be implemented in macrolib,
it would be nice if INTEL provided them but none of them are available.
We believe they would make use of UASM even more  8) 
Quote

;========================================================
; the macro for moving 64 bit value to a memory location
; usage:  MOV64  num2,102030405060708h
; output: dword ptr [num2 (07FF78F4B5019h)],5060708h 
;         dword ptr [num2+4h (07FF78F4B501Dh)],1020304h
; 0x00007FF697D85019  08 07 06 05 04 03 02 01
MOV64 MACRO dst:REQ, imm:REQ
;========================================================

; the macro for moving 128 bit value to a memory location
; usage:  MOV64  num2,0001020304050607h,08090a0b0c0d0e0fh
; dword ptr [num2 (07FF697D85019h)],0C0D0E0Fh 
; dword ptr [num2+4h (07FF697D8501Dh)],8090A0Bh
; dword ptr [num1 (07FF697D85021h)],4050607h 
; dword ptr [num1+4h (07FF697D85025h)],10203h 
; 0x00007FF697D85019  0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
MOV128 MACRO dst:REQ, immLo:REQ,immHi:REQ
;========================================================

; the macro loads 128 bit immediate value to any xmm register
; the value has to be reverted EG:
; MOVXMM128 xmm0, 0f0e0d0c0b0a0908h,0706050403020100h
; MOVXMM128 xmm1, "redroeht","desreveR"
; XMM0 = 0F0E0D0C0B0A09080706050403020100
; XMM1 = 726564726F6568746465737265766552
; but when you store register in memory we will get it right
; 0x00007FF7431A52D8  00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f  ................
; 0x00007FF7431A52E8  52 65 76 65 72 73 65 64 74 68 65 6f 72 64 65 72  Reversedtheorder
MOVXMMR128 MACRO dst:REQ, immLo:REQ,immHi:REQ
;========================================================

; This macro shift left 128 bit xmm register value
; the value has to be reverted EG: "redroeht","desreveR"
; cnt is limited to low 7 bits, 127 or 7Fh, to avoid overflow
; MOVXMMR128  xmm0, "redroeht","desreveR"
; MOVXMMR128  xmm1, "redroeht","desreveR"
; XMM0 = 726564726F6568746465737265766552
; XMM1 = 726564726F6568746465737265766552
; SLXMMR  xmm0,16
; SLXMMR  xmm1,72;
; XMM0 = 0000726564726F656874646573726576
; XMM1 = 000000000000000000726564726F6568
; 0x00007FF651025258  76 65 72 73 65 64 74 68 65 6f 72 64 65 72 00 00  versedtheorder..
; 0x00007FF651025268  68 65 6f 72 64 65 72 00 00 00 00 00 00 00 00 00  heorder.........
SLXMMR MACRO xmm128,cnt 
;========================================================

; This macro shift left 128 bit memory value
; the value is in normal order EG; 12345678
; .data
; num4 db "The actual order"
; num2 db "The actual order"
;  lea rax,num4               ;pointer to memory in rax
;  SHIFTLEFT128  rax,16
;  lea rax,num2               ;pointer to memory in rax
;  SHIFTLEFT128  rax,72
;before:
;0x00007FF7B4A45000  54 68 65 20 61 63 74 75 61 6c 20 6f 72 64 65 72  The actual order
;0x00007FF7B4A45010  54 68 65 20 61 63 74 75 61 6c 20 6f 72 64 65 72  The actual order
;after:
;0x00007FF7F6E95000  65 20 61 63 74 75 61 6c 20 6f 72 64 65 72 00 00  e actual order..
;0x00007FF7F6E95010  6c 20 6f 72 64 65 72 00 00 00 00 00 00 00 00 00  l order.........
SHIFTLEFT128 MACRO mmr,cnt
;========================================================

; This macro shift right 128 bit xmm register value
; the value has to be reverted EG; 87654321
;  MOVXMMR128  xmm0, "redroeht","desreveR"
;  MOVXMMR128  xmm1, "redroeht","desreveR"
;  SRXMMR  xmm0, 16
;  SRXMMR  xmm1, 0x48
; before shift:     
; XMM0 = 726564726F6568746465737265766552
; XMM1 = 726564726F6568746465737265766552
; after shift:     
; XMM0 = 64726F65687464657372657665520000
; XMM1 = 65737265766552000000000000000000
; stored in memory:
; 0x00007FF764DA5268  00 00 52 65 76 65 72 73 65 64 74 68 65 6f 72 64  ..Reversedtheord
; 0x00007FF764DA5278  00 00 00 00 00 00 00 00 00 52 65 76 65 72 73 65  .........Reverse
SRXMMR MACRO xmm128,cnt
;========================================================

; This macro shift right 128 bit memory value
; the value is in normal order EG; 12345678
;  lea rax,num4              ;pointer to memory in rax
;  SHIFTRIGHT128  rax,16                             
;  lea rax,num2              ;pointer to memory in rax
;  SHIFTRIGHT128  rax,72
; before:
; 0x00007FF62C4E5000  54 68 65 20 61 63 74 75 61 6c 20 6f 72 64 65 72  The actual order
; 0x00007FF62C4E5010  54 68 65 20 61 63 74 75 61 6c 20 6f 72 64 65 72  The actual order
; after:
; 0x00007FF68E9C5000  00 00 54 68 65 20 61 63 74 75 61 6c 20 6f 72 64  ..The actual ord
; 0x00007FF68E9C5010  00 00 00 00 00 00 00 00 00 54 68 65 20 61 63 74  .........The act
SHIFTRIGHT128 MACRO mmr,cnt
;========================================================
« Last Edit: October 11, 2017, 09:17:15 AM by habran »
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habran

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Re: RECORDS 128 bite wide implemented in UASM
« Reply #2 on: October 11, 2017, 09:24:38 AM »
I have completed and commented those macros to make it easier to regorge ;)
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Sakimanei

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Re: RECORDS 128 bite wide implemented in UASM
« Reply #3 on: November 13, 2017, 08:03:31 PM »
This is so wonderful that I found it.