Author Topic: FISTTP  (Read 316 times)

mabdelouahab

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FISTTP
« on: August 09, 2018, 08:12:15 AM »
Code: [Select]
include masm32rt.inc
.data
r1 REAL8 1.0
r2 REAL8 1.0
r3 REAL8 0.0
.code
Start:
FLD r1
FLD r2
FDIV
FISTTP r3
end Start
Works well with ML.EXE
But with UASM64.EXE:
Code: [Select]
C:\Masm32\Bin\UASM64.EXE /c /coff /Cp /nologo /I"C:\Masm32\Include" "ss.asm"

***********
ASCII build
***********

ss.Asm(11) : Error A2030: Instruction or register not accepted in current CPU mode
ss.Asm: 12 lines, 1 passes, 138 ms, 0 warnings, 1 errors

Spec-Chum

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Re: FISTTP
« Reply #1 on: August 09, 2018, 09:02:39 AM »
Works fine in 64 bit mode.

FISTTP, despite looking like a FPU instruction, is actually part of SSE3, or at least was introduced with it, so you'll probably need
Code: [Select]
.686
.xmm
at the top.

jj2007

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Re: FISTTP
« Reply #2 on: August 09, 2018, 09:14:07 AM »
fisttp is an FPU instruction. It works fine with UAsm, but it needs indeed at least .686 and .xmm:
Code: [Select]
include \masm32\include\masm32rt.inc
.686
.xmm
.data
r1 REAL8 1230.0
r2 REAL8 41.0
r3 REAL8 123.456
.code
start:
  fld r1
  fld r2
  fdiv
  fisttp r3
  printf("Result=%i", r3)
  exit
end start

Both ML 10.0 and UAsm do not throw an error for using fisttp with a REAL8. They should, because it stores an integer.

Spec-Chum

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Re: FISTTP
« Reply #3 on: August 09, 2018, 09:33:50 AM »
I meant it's not a 387 instruction, not it's not an actual FPU one :D

mabdelouahab

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Re: FISTTP
« Reply #4 on: August 10, 2018, 12:54:23 AM »
Thank you  :t

jj2007

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Re: FISTTP
« Reply #5 on: August 10, 2018, 04:12:41 AM »
FISTTP, despite looking like a FPU instruction
I meant it's not a 387 instruction, not it's not an actual FPU one :D

Do you have any evidence that it's not a 387 instruction?

Intel manual: The FISTTP instruction in SSE3 is an arithmetic x87 FPU instruction

Spec-Chum

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Re: FISTTP
« Reply #6 on: August 10, 2018, 09:59:43 AM »
FISTTP, despite looking like a FPU instruction
I meant it's not a 387 instruction, not it's not an actual FPU one :D

Do you have any evidence that it's not a 387 instruction?

Intel manual: The FISTTP instruction in SSE3 is an arithmetic x87 FPU instruction

I'm pretty sure a 387 coprocessor from 1987 doesn't have SSE3, yes.

Again, I was just pointing out that I assume putting no arch directive in defaults to 386; all I said was he needed a SSE3 capable arch in there as that's not a 387 instruction, and I stand by that.

Are you always this petty?

jj2007

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Re: FISTTP
« Reply #7 on: August 10, 2018, 10:06:26 AM »
> Are you always this petty?

Sometimes, yes :bgrin:

Your initial wording "FISTTP, despite looking like a FPU instruction, is actually part of SSE3" implies that "it's not a FPU instruction, it only looks like one". But don't worry, I won't insist - you seem to know your stuff, and that is what counts here ;-)
 :icon14:

Spec-Chum

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Re: FISTTP
« Reply #8 on: August 10, 2018, 10:12:06 AM »
> Are you always this petty?

Sometimes, yes :bgrin:

Your initial wording "FISTTP, despite looking like a FPU instruction, is actually part of SSE3" implies that "it's not a FPU instruction, it only looks like one". But don't worry, I won't insist - you seem to know your stuff, and that is what counts here ;-)
 :icon14:

That's fair enough lol

I maybe should have put "FISTTP, despite looking like a 387 FPU instruction..."

We both had a point, to be fair  :t