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Author Topic: Test Results for feature detection required  (Read 9691 times)

Gunther

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Test Results for feature detection required
« on: February 01, 2021, 11:04:34 PM »
The archive cpu.zip contains 3 files:

cpu.asm (assembly language source), cpu.exe (the running 64 bit console application) and build_cpu.bat (builds the application).

The output of the program depends on the machine it is running on. It outputs a few information about the processor. This is the result on my Windows 10 computer:
Code: [Select]
CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Core(TM)i7-7820XCPU@3.60GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX  AVX2  AVX-512 F

It's safe to use the following AVX-512 extensions with this machine:
--------------------------------------------------------------------

AVX-512 DQ         : Vector Double Word and Quad Word
AVX-512 CD         : Efficient conflict detection to allow more loops to be vectorized.
AVX-512 BW         : Extends AVX-512 to cover 8-bit and 16-bit integer operations.
AVX-512 VL         : Extends most AVX-512 operations to also operate on XMM and YMM registers.

Any processor that implements any portion of the AVX-512 extensions MUST implement AVX-512 F.
Not every architecture has all the instruction sets built in. We've for example:

Knights Landing    : CD ER PF
Knights Mill       : CD ER PF 4FMAPS 4VNNIW VPOPCNTDQ
Skylake            : CD VL DQ BW
Cannon Lake        : CD VL DQ BW IFMA VBMI
Cascade Lake       : CD VL DQ BW VNNI
Ice Lake           : CD VL DQ BW IFMA VBMI VBMI2 VPOPCNTDQ BITALG VNNI VPCLMULQDQ GFNI VAES
Tiger Lake         : CD VL DQ BW IFMA VBMI VBMI2 VPOPCNTDQ BITALG VNNI VPCLMULQDQ GFNI VAES VP2INTERSECT

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

RDRAND             : Returning random numbers from an on-chip hardware random number generator.
AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.
The program is started normally with cpu or cpu.exe from the command line. Since quite a lot may be displayed, you have to scroll a bit to be able to read everything. Alternatively, you can launch the application in full-screen mode.
The third variant is to use a pipe, something like this:
Code: [Select]
cpu.exe>cpu.txt
With other processors, a different output will naturally result. I don't want to be nosy, but results from other forum members would be helpful. Thanks in advance.

Gunther
« Last Edit: February 05, 2021, 09:04:49 PM by Gunther »
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hutch--

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Re: Test Results for feature detection required
« Reply #1 on: February 01, 2021, 11:55:02 PM »
This is my result. The only difference from the result is that I have the 5820k clocked at 4 gig.

CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Core(TM)i7-5820KCPU@3.30GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX  AVX2

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

RDRAND             : Returning random numbers from an on-chip hardware random number generator.
AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.
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FORTRANS

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Re: Test Results for feature detection required
« Reply #2 on: February 02, 2021, 01:53:36 AM »
Hi,

   Two laptops.

Code: [Select]
CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Core(TM)i3-4005UCPU@1.70GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX  AVX2

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

RDRAND             : Returning random numbers from an on-chip hardware random number generator.
AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.



CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Core(TM)i3-10110UCPU@2.10GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX  AVX2

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

RDRAND             : Returning random numbers from an on-chip hardware random number generator.
AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.

Regards,

Steve N.
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mineiro

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Re: Test Results for feature detection required
« Reply #3 on: February 02, 2021, 02:03:59 AM »
wine cpu.exe
Code: [Select]
CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Core(TM)i7-6700CPU@3.40GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX  AVX2

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

RDRAND             : Returning random numbers from an on-chip hardware random number generator.
AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
SMX                : Safer Mode Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.
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six_L

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Re: Test Results for feature detection required
« Reply #4 on: February 02, 2021, 02:54:29 AM »
Quote
CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Core(TM)i5-9400HCPU@2.50GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX  AVX2

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

RDRAND             : Returning random numbers from an on-chip hardware random number generator.
AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
SMX                : Safer Mode Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.
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Gunther

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Re: Test Results for feature detection required
« Reply #5 on: February 02, 2021, 12:21:34 PM »
Thanks for using this small application going to: Steve (aka Hutch), Steve N. (aka FORTRANS), mineiro, six_L.  :thumbsup:

The program will hopefully be helpful for some other programmers. I am now working on structuring it better, testing the rest and also recognizing the new instructions announced by Intel.
I mean in particular AMX (Advanced Matrix Extensions). 

Gunther
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felipe

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Re: Test Results for feature detection required
« Reply #6 on: February 03, 2021, 09:47:07 AM »
Code: [Select]
CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Core(TM)i5CPU650@3.20GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
SMX                : Safer Mode Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is sup
ported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.

Nice program, thanks Gunther for sharing it  :thup:. It's nice to have you back.  :mrgreen:
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jj2007

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Re: Test Results for feature detection required
« Reply #7 on: February 03, 2021, 12:21:27 PM »
Code: [Select]
CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Core(TM)i5-2450MCPU@2.50GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.
Very nice, Gunther :thumbsup:

For comparison, PrintCpu yields a simpler
Code: [Select]
Intel(R) Core(TM) i5-2450M CPU @ 2.50GHz (MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX)
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Gunther

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Re: Test Results for feature detection required
« Reply #8 on: February 03, 2021, 02:13:03 PM »
Thanks to Felipe and Jochen. :thumbsup:

Quote from: felipe on February 03, 2021, 09:47:07 AM
Nice program, thanks Gunther for sharing it  :thup:. It's nice to have you back.  :mrgreen:

I think it could be better. Especially the procedure Iset is too overloaded. I have already fixed this in the new version. In addition, not all AVX-512 extensions are currently queried properly. I'm in the process of fixing that right now.

We need this routine for the fractal compression at CERN. At the moment, it still runs with FPU code. But we have now set up different code paths in the new version. So I have now written everything to be callable from C or C++.
This should always be kept in mind when judging the source. As a pure assembly language application, I would solve some things differently. Of course, all these variables and flags are only needed at runtime to select the
correct code path. I only do the output for the version here in the forum. Maybe this helps the one or the other programmer?

It's pretty intricate. The PC farm at CERN, with over 20 000 computers and more than 30 000 cores, is very heterogeneous. There are historical reasons for this, which I will not go into here.

Quote from: jj2007 on February 03, 2021, 12:21:27 PM
Very nice, Gunther :thumbsup:

For comparison, PrintCpu yields a simpler
Code: [Select]
Intel(R) Core(TM) i5-2450M CPU @ 2.50GHz (MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX)

As already said above: It still has weaknesses and could be better.

Please wait for the next version.

Gunther
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LiaoMi

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Re: Test Results for feature detection required
« Reply #9 on: February 03, 2021, 05:14:22 PM »
Hi Gunther,

my results  :thumbsup:

Code: [Select]
CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Core(TM)i7-4810MQCPU@2.80GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX  AVX2

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

RDRAND             : Returning random numbers from an on-chip hardware random number generator.
AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
SMX                : Safer Mode Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.

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TimoVJL

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Re: Test Results for feature detection required
« Reply #10 on: February 03, 2021, 05:24:05 PM »
Code: [Select]
CPU strings:
------------

Processor Vendor String: AuthenticAMD
Processor Brand String:  AMDRyzen53400GwithRadeonVegaGraphics

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2  AVX  AVX2

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

RDRAND             : Returning random numbers from an on-chip hardware random number generator.
AESNI              : Advanced Encryption Standard Instruction Set
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.
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Gunther

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Re: Test Results for feature detection required
« Reply #11 on: February 03, 2021, 06:25:27 PM »
Thanks to LiaoMi and TimoVJL for testing. :thumbsup: It seems to work with AMD processors, too. That's good news.

Gunther
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jj2007

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Re: Test Results for feature detection required
« Reply #12 on: February 03, 2021, 08:56:16 PM »
Quote from: Gunther on February 03, 2021, 02:13:03 PM
The PC farm at CERN, with over 20 000 computers and more than 30 000 cores, is very heterogeneous. There are historical reasons for this, which I will not go into here.

Quote from: jj2007 on February 03, 2021, 12:21:27 PM
Very nice, Gunther :thumbsup:

For comparison, PrintCpu yields a simpler
Code: [Select]
Intel(R) Core(TM) i5-2450M CPU @ 2.50GHz (MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX)

As already said above: It still has weaknesses and could be better.

It's working fine :thumbsup:

For testing if an application can run on one of your 20,000 machines, you could write a macro (or a proc for C) like WillRunFine(bitmask) that returns true or false.
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Gunther

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Re: Test Results for feature detection required
« Reply #13 on: February 04, 2021, 04:18:59 AM »
Jochen,

Quote from: jj2007 on February 03, 2021, 08:56:16 PM
It's working fine :thumbsup:

For testing if an application can run on one of your 20,000 machines, you could write a macro (or a proc for C) like WillRunFine(bitmask) that returns true or false.

probably a function, which can check the needed variables to select the corresponding code path. Another possibility would be Intel's CPU dispatch. But one would need the Intel compiler and the question is: What will the Intel compiler do on an AMD processor?

Gunther
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mikeburr

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Re: Test Results for feature detection required
« Reply #14 on: February 05, 2021, 08:55:28 AM »
bit late ...but
CPU strings:
------------

Processor Vendor String: GenuineIntel
Processor Brand String:  Intel(R)Xeon(R)CPUX5670@2.93GHz

Features by Processor and Operating System:
-------------------------------------------

Supported Instruction Sets: MMX  SSE  SSE2  SSE3  SSSE3  SSE4.1  SSE4.2

Your CPU supports the following additional instructions and features:
---------------------------------------------------------------------

AESNI              : Advanced Encryption Standard Instruction Set
VMX                : Virtual Machine Extensions
SMX                : Safer Mode Extensions
FPU                : Floating Point Unit on chip
VME                : Virtual 8086 Mode Enhancements
DE                 : Debugging Extensions. Support for I/O breakpoints.
PSE                : Page Size Extension
TSC                : Time Stamp Counter. The RDTSC instruction is supported.
MSR                : Model Specific Registers RDMSR and WRMSR Instructions.
PAE                : Physical Address Extension
CX8                : CMPXCHG8B instruction (compare-and-exchange 8 bytes) is supported.
APIC               : The processor contains an Advanced Programmable Interrupt Controller (APIC) on board.

regards mike
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