Hi Guys
Finished an article about the several different flags and masks used in FPU and SSE registers (Control Word, Status Words, mask and friends).
I hope this is clear and easier to follow as possible. I created a new set of equates to be used on this opcodes to make our life a bit easier when working with those masks.
It may be useful not only for RosAsm, but for masm users as well.
The pdf is bigger than the limit allowed on the forum, so here are the links where it can be downloaded:
:icon_idea: Version2 of the article (Updated - 03/05/2025) - added more equates
Version2 - Updated (https://www.mediafire.com/file/hmyzl0ak90agfy8/X87_FPU_and_SSE_Guide_v2.zip/file)
Verson 2 - Direct Link from the old forum (https://attachment.tapatalk-cdn.com/26817/202505/2_4845bf8b2c7a77fdfca7c7d09fb64537.zip)
Link of the article on the main RosAsm old forum (https://www.tapatalk.com/groups/rosasm/viewtopic.php?f=4&t=42)
version1 of the article
Link of the article on the main RosAsm old forum (https://www.tapatalk.com/groups/rosasm/viewtopic.php?f=4&t=42)
Direct link (https://attachment.tapatalk-cdn.com/26817/202505/2_e7331d72484b49c63d03cd287c1e41c1.zip)
MediaFire (https://www.mediafire.com/file/86pmnio56pgcdb4/X87_FPU_and_SSE_Guide.zip/file)
Great work guga :thumbsup:
Thanks a lot ! :thumbsup: :thumbsup: :thumbsup: I'm creating two or three more equates to work better with these FPU and SSE masks. Once I'm done, I'll update the article if necessary, or I'll just post them as comments here.
New equates added:
FPU_DEFAULT_CONTROL_WORD_ALL_MASKED 0x3F
FPU_DEFAULT_CONTROL_WORD_WITH_RESERVED 0x7F
SSE_MXCSR_CONTROL_ALL 0xFF80
FPU_DEFAULT_CONTROL_WORD_ALL_MASKED (0x03F): Combines all exception masks (bits 0-5: Invalid Operation, Denormalized, Zero Divide, Overflow, Underflow, Precision). Value: 0x01 + 0x02 + 0x04 + 0x08 + 0x10 + 0x20 = 0x3F. Use this when you want to ensure all exceptions are masked (default behavior) and bit 6 is 0, as recommended for modern CPUs.
Usage:
fnstcw W@ControlWord
mov ax &FPU_DEFAULT_CONTROL_WORD ; Start with default (0x033F)
or ax &FPU_DEFAULT_CONTROL_WORD_ALL_MASKED ; Ensure bits 0-5 are 1 (0x3F)
mov W@ControlWord ax
fldcw W@ControlWord
FPU_DEFAULT_CONTROL_WORD_WITH_RESERVED (0x7F): Extends FPU_DEFAULT_CONTROL_WORD_ALL_MASKED to include the reserved bit 6 (0x40). Value: 0x3F + 0x40 = 0x7F. Use this for compatibility with legacy configurations (e.g., float.h in C libraries) where bit 6 is set. Modern CPUs ignore bit 6, but some older software expects it to be 1.
Usage:
fnstcw W@FCW
mov ax W@FCW
and ax &FPU_DEFAULT_CONTROL_WORD_WITH_RESERVED
If ax = &FPU_DEFAULT_CONTROL_WORD_WITH_RESERVED
mov eax &TRUE
Else
mov eax &FALSE
End_If
SSE_MXCSR_CONTROL_ALL (0xFF80): To simplify working with the MXCSR's control bits (bits 6-15, covering DAZ, exception masks, rounding, and FTZ), we've added a new combined equate. This equate is designed for procedures like CheckEnvironment, where you need to verify or set these bits without worrying about status flags (bits 0-5).
Usage:
stmxcsr D@MXCSR
mov eax D@MXCSR
and eax &SSE_MXCSR_CONTROL_ALL
If eax = &SSE_MXCSR_FULL_OPTIMIZATION
mov eax &TRUE
Else
mov eax &FALSE
End_If• Covers bits 6-15: DAZ (bit 6), exception masks (bits 7-12), rounding mode (bits 13-14), and FTZ (bit 15).
• Value: 0x0040 + 0x0080 + 0x0100 + 0x0200 + 0x0400 + 0x0800 + 0x1000 + 0x2000 + 0x4000 + 0x8000 = 0xFF80.
• Use this to mask or set all control bits, ensuring a consistent SSE/SSE2 environment, especially when enabling performance optimizations like FTZ and DAZ.
Updated the article and posted the new links on the 1st post
Very nice work, guga.
Also, off topic, but I love your signature! :biggrin:
Off topic:
signature of 10% of alcoholic levels in your blood don't conforms some of studies, like Microsoft, less than 1 %% can be useful.
For an example, richedit might not programmed in sober state and results we all know :biggrin:
PS: i wasn't sober while writing this :biggrin:
Quote from: TimoVJL on May 03, 2025, 08:15:27 PMFor an example, richedit might not programmed in sober state and results we all know :biggrin:
I'd say the alcohol levels had to be around 50% when they were programming Rich Edit... :rofl:
Quote from: TimoVJL on May 03, 2025, 08:15:27 PMOff topic:
...
BS: i wasn't sober while writing this :biggrin:
Is that really BS???
Or did you mean PS? Inebriation can cause those effects. :joking:
In my case though I would think it a typo, or my iPads autocorrect 'assisting' me. I do not partake in alcoholic beverages.
A that Microsoft study wasn't BS, but i don't have a link for it right now.
Quote from: TimoVJL on May 03, 2025, 11:56:17 PMA that Microsoft study wasn't BS, but i don't have a link for it right now.
No, I wasn't talking about the Microsoft study. But what I assume was supposed to be your post script. I.e., BS vs. PS... :biggrin:
Where you said "BS: i wasn't sober while writing this :biggrin: "
My attempt at humor before having my morning coffee.
Now back to the originally scheduled topic. Sorry guga.
An old message fixed for that BS/PS thing :biggrin:
Obligatory XKCD :biggrin:
(https://imgs.xkcd.com/comics/ballmer_peak.png)
:biggrin: :biggrin: :biggrin: :biggrin: :biggrin:
@guga
You might be here with some funny people for you.
See things a their own way and you might like it.
Hi Timo.
I'm enjoying it. It's fun to read. :biggrin: :biggrin: :biggrin: I never thought anyone would notice the joke I put in my signature :bgrin: . But, regarding RichEdit, well... maybe we really need to have 50% alcohol in your bloodstream to get the right programs for RichEdit.
Sorry to interrupt the yuk-fest here, but @Guga:
If you're going to post things like assembler EQUates, could you please do it in MASM syntax?
I hate to break it to you, but nobody[1] uses your strange RosAsm.
Which means anyone who wants to use those statements has to translate them.
We now return to the yuk-fest which is in progress ...
[1] For certain values of "nobody", which is down in the single-digit percentages.
Hi David.
I though it could be easy to read. Although the guide is intended for RosAsm, i only put a bit of RosAsm syntax in some examples, but the whole equates values are in their own tables containing the hexadecimal values, not the syntax (either for RosAsm or Masm).
SSE_MXCSR_FULL_OPTIMIZATION (0x9FC0) - No need for any syntax here. Or also in the tables i used. I described what were the values. Like in:
QuoteBits Equate Hex Binary Description
0 FPU_EXCEPTION_INVALIDOPERATION 0x01 0000_0000_0000_0001 Invalid Operation Mask
1 FPU_EXCEPTION_DENORMALIZED 0x02 0000_0000_0000_0010 Denormal Operand Mask