The MASM Forum

General => The Campus => Topic started by: Magnum on December 08, 2013, 11:57:51 PM

Title: Hardware Lock Elision
Post by: Magnum on December 08, 2013, 11:57:51 PM
Though my CPU can not use it, can someone break this down into simpler terms.

Andy


TSX provides two software interfaces for designating code regions for transactional execution. Hardware Lock Elision (HLE) is an instruction prefix-based interface designed to be backward compatible with processors without TSX support. Restricted Transactional Memory (RTM) is a new instruction set interface that provides greater flexibility for programmers.[7]

TSX enables optimistic execution of transactional code regions. The hardware monitors multiple threads for conflicting memory accesses, while aborting and rolling back transactions that cannot be successfully completed. Mechanisms are provided for software to detect and handle failed transactions.[7]

In other words, lock elision through transactional execution uses memory transactions as a fast path where possible, while the slow (fallback) path is still a normal lock.
Title: Re: Hardware Lock Elision
Post by: dedndave on December 09, 2013, 02:57:14 AM
please, change the "code" tags to "quote" tags so it will line-wrap   :biggrin:

looks like it has something to do with accessing shared memory from multiple threads (transactional)