error A2005:symbol redefinition : movbe

[frktons]

In one of my routines I'm trying to use MOVBE
but MASM complains.

The two instructions where I use it are:

Code Select Expand


            movbe dword ptr [ebx], edx
            movbe dword ptr [eax], edi


and another strange error in REPEAT/ENDM [I think]:

Microsoft (R) Macro Assembler Version 10.00.30319.01
Copyright (C) Microsoft Corporation.  All rights reserved.

Assembling: F:\Esempi_PGM\Assembly\TestReverse2.asm
F:\Esempi_PGM\Assembly\TestReverse2.asm(187) : error A2005:symbol redefinition : movbe
MacroLoop(50): teration 1: Macro Called From
  F:\Esempi_PGM\Assembly\TestReverse2.asm(187): Main Line Code
F:\Esempi_PGM\Assembly\TestReverse2.asm(187) : error A2005:symbol redefinition : movbe
MacroLoop(49): teration 2: Macro Called From
  F:\Esempi_PGM\Assembly\TestReverse2.asm(187): Main Line Code
F:\Esempi_PGM\Assembly\TestReverse2.asm(187) : error A2005:symbol redefinition : movbe
MacroLoop(50): teration 2: Macro Called From
  F:\Esempi_PGM\Assembly\TestReverse2.asm(187): Main Line Code
F:\Esempi_PGM\Assembly\TestReverse2.asm(188) : error A2016:expression expected
MacroLoop(49): teration 1: Macro Called From
  F:\Esempi_PGM\Assembly\TestReverse2.asm(188): Main Line Code
F:\Esempi_PGM\Assembly\TestReverse2.asm(188) : error A2138:invalid data initializer
MacroLoop(49): teration 1: Macro Called From
  F:\Esempi_PGM\Assembly\TestReverse2.asm(188): Main Line Code
_
Assembly Error

If I change:

Code Select Expand


            movbe dword ptr [ebx], edx
            movbe dword ptr [eax], edi


with

Code Select Expand


            movbe [ebx], edx
            movbe [eax], edi


The first error goes away, but the second stays put.  ::)

What could it be.
Attached the complete prog.

[qWord]

movbe means CMOVBE? The conditional moves  can only have a register as destination (See the manuals!!!).

[frktons]

movbe means CMOVBE? The conditional moves  can only have a register as destination (See the manuals!!!).

Intel says:

Performs a byte swap operation on the data copied from the second operand (source
operand) and store the result in the first operand (destination operand). The source
operand can be a general-purpose register, or memory location; the destination
register can be a general-purpose register, or a memory location; however, both
operands can not be registers, and only one operand can be a memory location. Both
operands must be the same size, which can be a word, a doubleword or quadword.
The MOVBE instruction is provided for swapping the bytes on a read from memory or
on a write to memory; thus providing support for converting little-endian values to
big-endian format and vice versa.

It is not a conditional move, if I understand correctly.

[hutch--]

Frank,

Two things, does your processor support that opcode AND does the MASM version you are using support that opcode ?

[qWord]

A quick search shows that this instruction is only suppored by Intel's Atom processors. Maybe not that usfull for common code.

http://software.intel.com/en-us/articles/disable-movbe-to-test-intel-atom-targeted-code-on-non-atom-platforms/

Later: the replacemnt is simply :

Code Select Expand

mov reg,data
bswap reg
mov dest,reg
Strange that they introduce a new instruction for that...

[frktons]

Frank,

Two things, does your processor support that opcode AND does the MASM version you are using support that opcode ?

Steve,

probably my CPU doesn't, and the same for MASM , it complains.

A quick search shows that this instruction is only suppored by Intel's Atom processors. Maybe not that usfull for common code.

http://software.intel.com/en-us/articles/disable-movbe-to-test-intel-atom-targeted-code-on-non-atom-platforms/

Later: the replacemnt is simply :

Code Select Expand

mov reg,data
bswap reg
mov dest,reg
Strange that they introduce a new instruction for that...

Thanks qWord, I thought the manuals were for all x86 CPUs.
I discovered it by chance and I was curious about its performance.

[qWord]

probably my CPU doesn't, and the same for MASM , it complains.

ML version 11 support that instruction.

[frktons]

probably my CPU doesn't, and the same for MASM , it complains.

ML version 11 support that instruction.

Good to know. If I'll have an Atom CPU I'll use it.