include file for memset

[TWell]

Code Select Expand

AMD E-450 APU with Radeon(tm) HD Graphics (SSE4)

[rsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsr
srsrsrsrsrsrsrsrsrrr#]
9943    cycles for 100 * rep stosd
[ccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc
cccccccccccccccccccc#]
10118   cycles for 100 * crt memset
[GGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGG
GGGGGGGGGGGGGGGGGGGG#]
22639   cycles for 100 * Gelatine
[sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse
2sse2sse2sse2sse2sss#]
6668    cycles for 100 * SSE2

[rsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsr
srsrsrsrsrsrsrsrsrrr#]
9900    cycles for 100 * rep stosd
[ccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc
cccccccccccccccccccc#]
10122   cycles for 100 * crt memset
[GGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGG
GGGGGGGGGGGGGGGGGGGG#]
22582   cycles for 100 * Gelatine
[sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse
2sse2sse2sse2sse2sss#]
6752    cycles for 100 * SSE2

[rsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsr
srsrsrsrsrsrsrsrsrrr#]
9986    cycles for 100 * rep stosd
[ccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc
cccccccccccccccccccc#]
10279   cycles for 100 * crt memset
[GGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGG
GGGGGGGGGGGGGGGGGGGG#]
22700   cycles for 100 * Gelatine
[sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse
2sse2sse2sse2sse2sss#]
6754    cycles for 100 * SSE2

[rsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsr
srsrsrsrsrsrsrsrsrrr#]
9967    cycles for 100 * rep stosd
[ccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc
cccccccccccccccccccc#]
10196   cycles for 100 * crt memset
[GGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGG
GGGGGGGGGGGGGGGGGGGG#]
22758   cycles for 100 * Gelatine
[sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse
2sse2sse2sse2sse2sss#]
6761    cycles for 100 * SSE2


--- ok ---

[dedndave]

that looks like the test is designed to favor SSE
let's just fill it with 0's   :t

[zedd151]

Code Select Expand

Genuine Intel(R) CPU           T2060  @ 1.60GHz (SSE3)

[rsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsr
srsrsrsrsrsrsrsrsrrr#]
8152    cycles for 100 * rep stosd
[ccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc
cccccccccccccccccccc#]
8299    cycles for 100 * crt memset
[GGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGG
GGGGGGGGGGGGGGGGGGGG#]
21351   cycles for 100 * Gelatine
[sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse
2sse2sse2sse2sse2sss#]
5799    cycles for 100 * SSE2

[rsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsr
srsrsrsrsrsrsrsrsrrr#]
7192    cycles for 100 * rep stosd
[ccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc
cccccccccccccccccccc#]
8294    cycles for 100 * crt memset
[GGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGG
GGGGGGGGGGGGGGGGGGGG#]
21255   cycles for 100 * Gelatine
[sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse
2sse2sse2sse2sse2sss#]
5803    cycles for 100 * SSE2

[rsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsr
srsrsrsrsrsrsrsrsrrr#]
7208    cycles for 100 * rep stosd
[ccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc
cccccccccccccccccccc#]
8313    cycles for 100 * crt memset
[GGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGG
GGGGGGGGGGGGGGGGGGGG#]
21292   cycles for 100 * Gelatine
[sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse
2sse2sse2sse2sse2sss#]
5882    cycles for 100 * SSE2

[rsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsrsr
srsrsrsrsrsrsrsrsrrr#]
7304    cycles for 100 * rep stosd
[ccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc
cccccccccccccccccccc#]
8315    cycles for 100 * crt memset
[GGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGGG
GGGGGGGGGGGGGGGGGGGG#]
21246   cycles for 100 * Gelatine
[sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse2sse
2sse2sse2sse2sse2sss#]
5804    cycles for 100 * SSE2


--- ok ---

[jj2007]

that looks like the test is designed to favor SSE
let's just fill it with 0's   :t

See Fast MemSet and Instr() algos.