Simple pulse counter and emitter program

[ImmortalPr1nce]

Ok so i know very little about programming but i need to make find a pic and make a program that will count pulses and every 53 pulses emit 1 pulse. the pulses will be coming from an induction magnetic pickup. can someone point me in the proper direction to get me started?

[hutch--]

Usually someone who cannot write their own software pays someone else to do it for them. try Rent A Coder.

[dedndave]

you don't need a program, you need a circuit
induction pick-ups are tricky little beasts, especially in noisy environments
you can probably google a simple transitor circuit, though
try looking around at "flow meter circuits"
they typically use magnetic induction pickoffs - some are RF induction types

as for the "divide-by-53" circuit
use a CD4040 (or MC14040) with a few gates (i would use a CD4081, i think)
wire the gates on the output to "detect" the value 53 (that's 4 bits of binary)
when 53 is reached, reset the 4040 and use the reset pulse for output
it will be a narrow pulse, but you can make it wider with an R-C time delay

that'll be $50   :P

[anunitu]

Hay Dave,You have any "Ray gun" Circuits? Just a little one though,enough to melt a small car.... :shock:

[dedndave]

i new a guy named Ray Gunn, once
does that count ?   :lol:

[Paulo]

Did he have any Gunn diodes? 

[dedndave]

his brother, Peter, may have   ::)

[Magnum]

I could use a ray gun too with dealing with some Lin@x "help" groups.

Andy

Vater gib mir bitte mehr Geduld.

[georg]

With a PIC, I suggest a 16F84A, use RA4T0CK as input to the TMR0, initialize the TMR0 with 203, set the interrupt of the TMR0 overflow, to generate the pulse, use a sub routine, some delay to shape the width of the pulse, and you are on your way, is hard to build circuits in noisy enviroments, make sure your PCB is properly shielded.

[dedndave]

a quicky sketch....



you are looking at about $1.50 in parts   :P
it will run from 5 to 15 volts and draws nano-amps
unless there is some reason for going with a PIC, i say keep it simple   :t

of course, there is still the amplifier circuit, but that would be needed, either way

[qWord]

dave,
that look nice, but isn't it problematic to connect the reset port with the AND-gates (because of glitches / race conditions)?

EDIT: OK I see you use a capacity to avoid that problem(?).

[dedndave]

no - that should be pretty reliable
you may have to play with the R-C values, to pick a more suitable time-constant
i picked those values out of the air, but i have been playing with CMOS for about 35 years - lol
you could drop the 100 K resistor to about 10 K for a narrower pulse
you could even eliminate the capacitor and use a larger resistor
the RESET input has something like 5 pf capacitance, on it's own

as for glitches - well - you put a cap on the power supply lead, of course
CMOS has pretty good noise-immunity

there is no race condition in this circuit, per se
there is a time-delay (we call it propagation delay) across the counter and each gate
in this case, the delay is actually desirable
we even add an R-C circuit to make it longer, so that the pulse has a little more width

race conditions occur when you expect state transitions to arrive at a gate at the same time
one logic path has a long delay and the other path has a short one - that is a race

i might add....
you can hard-wire any practical divisor you like
53 is 110101 binary, which corresponds to the selection of Q6, Q5, Q3, and Q1
those four outputs all go hi -> little time delay -> the counter resets and starts over

[Paulo]

One could also do it with a small 8 pin micro.



Datasheet here:

http://www.atmel.com/Images/1006s.pdf

[qWord]

as for glitches - well - you put a cap on the power supply lead, of course
CMOS has pretty good noise-immunity

I thought on glitches that are caused by the propagation delay Q_n -> Q_n+1 (TI says 100ns @ 5V).

[Paulo]

as for glitches - well - you put a cap on the power supply lead, of course
CMOS has pretty good noise-immunity

I thought on glitches that are caused by the propagation delay Q_n -> Q_n+1 (TI says 100ns @ 5V).

I must admit that I thought about that too.
Would it not be better to use a 4 input AND gate instead of cascading 2 input ones?